Fault-Tolerant Nanocomputers Based on Asynchronous Cellular Automata

Teijiro Isokawa, Fukutaro Abo, Ferdinand Peper*, Susumu Adachi*, Jia Lee*, Nobuyuki Matsui, and Shinro Mashiko*
* Nanotechnology Group, National Institute of Information and Communications Technology

Cellular Automata (CA) are a promising architecture for computers with nanometer-scale sized components, because their regular structure potentially allows chemical manufacturing techniques based on self-organization. With the increase in integration density, however, comes a decrease in the reliability of the components from which such computers will be built. This paper employs BCH error-correcting codes to construct CA with improved reliability. We construct an asynchronous CA of which a quarter of the (ternary) bits storing a cell's state information may be corrupted without affecting the CA's operations, provided errors are evenly distributed over a cell's bits (no burst errors allowed). Under the same condition, the corruption of half of a cell's bits can be detected.

International Journal of Modern Physics C, vol.15, no.6, pp.893-915 (2004).